Researchers from National Yang Ming Chiao Tung University and TSMC have developed a new interface design for atomically thin transistors. They created a 0.42-nanometre aluminium oxide layer between monolayer MoS2 and a hafnium oxide dielectric. The design helped the transistors maintain strong electrical control and carrier transport while using an extremely thin insulating layer.
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TSMC builds 0.42nm interface to improve next-gen MoS2 transistors
- by The News Vista
- August 12, 2026
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- 4 hours ago

